1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and in particular to a method of manufacturing a semiconductor device having a grooved transistor and an antifuse element.
2. Description of the Related Art
The semiconductor device technology has been evolved year by year, enlarging the scale and capacity of semiconductor devices. As for typical semiconductor storage devices, for example, 1 Gbit dynamic random access memories (DRAMs) have been commercialized. Such large-capacity semiconductor devices employ a redundant circuit for substituting and remedying a defective memory cell. The redundant circuit remedies a defective memory cell by storing an address of the defective memory cell in a nonvolatile storage element and switching to an auxiliary memory cell. Thus, the redundant circuit for substituting and remedying a defective memory cell is used to improve the yield and to reduce the cost of semiconductor devices.
The nonvolatile storage elements applicable to such redundant circuits include a fuse element which fuses a polysilicon or metal wiring with laser or high current, and an antifuse element which breaks and short-circuits a polysilicon or metal wiring by applying a high voltage equivalent to a critical voltage or higher. In recent years, the antifuse element has become employed in many cases for such reasons that write is possible even after a packaging process, and power consumption is low since current required to break an insulating film is lower than current required to blow a wiring. Thus, semiconductor devices having an antifuse element have become more common.
Such antifuse elements are applicable widely. For example, an antifuse element is usable not only to replace a defect address in a redundant circuit as described above, but also to adjust the timing of a delay circuit, to control an internal voltage, and to change the bit or word organization of a storage device. Because of such wide applications, it is desired for the antifuse elements to be writable even after packaging of a semiconductor device, and to be stably low in resistance after the writing.
The antifuse element, which is a nonvolatile storage element, will be described with reference to FIGS. 1 and 2.
The antifuse element shown in FIG. 1 is of a type that breaks a gate insulating film, and is manufactured by a similar method to that for ordinary MOS transistors. In FIG. 1, a gate oxide film 202 and a gate electrode 203 are formed on a P-type semiconductor substrate 201. Further, the P-type semiconductor substrate 201 is formed with an N+ source/drain diffusion region 204.
Writing to this transistor-type antifuse element is performed by applying a positive high voltage to the gate electrode 203 to form a channel in the surface of the P-type semiconductor substrate 201, while breaking the gate oxide film 202. This breakdown location 205 becomes an N-type semiconductor since the gate electrode is of an N-type in general. Therefore, if the scale of the breakdown is small, a problem is induced that electrical connection is not stable between the breakdown location 205 and the N+ source/drain diffusion region 204. Accordingly, application of a high voltage is required to ensure large breakdown and stable electrical connection.
Japanese Laid-Open Patent Publication No. 2004-111957 (Patent Document 1) discloses a method of ensuring such stable electrical connection.
As shown in FIG. 2, an N− diffusion layer 301 is formed on the surface of the P-type semiconductor substrate 201 directly below the gate electrode 203. The breakdown location 205 is thus stably electrically connected to an N− diffusion layer 301. This solves the problem of instable electrical connection between the breakdown location 205 and the N+ source/drain diffusion region 204. However, a lithography process and a channel implantation process are additionally required to form the N− diffusion layer 301. Thus, new problems occur such as increased number of process steps and increased cost. There is a demand for development of antifuse elements which do not involve a problem of increased cost.